High Throughput/Gate FN-Based Hardware Architectures for AES-OTR - researchr publication authors

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Rei Ueno, Naofumi Homma, Tomonori Iida, Kazuhiko Minematsu. High Throughput/Gate FN-Based Hardware Architectures for AES-OTR. In IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019. pages 1-4, IEEE, 2019. [doi]

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