A 1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters

Takeshi Ueno, Tomohiko Ito, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura. A 1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters. In Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006, DoubleTree Hotel, San Jose, California, USA, September 10-13, 2006. pages 501-504, IEEE, 2006. [doi]

@inproceedings{UenoIKYI06,
  title = {A 1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters},
  author = {Takeshi Ueno and Tomohiko Ito and Daisuke Kurose and Takafumi Yamaji and Tetsuro Itakura},
  year = {2006},
  doi = {10.1109/CICC.2006.320893},
  url = {http://dx.doi.org/10.1109/CICC.2006.320893},
  researchr = {https://researchr.org/publication/UenoIKYI06},
  cites = {0},
  citedby = {0},
  pages = {501-504},
  booktitle = {Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006, DoubleTree Hotel, San Jose, California, USA, September 10-13, 2006},
  publisher = {IEEE},
  isbn = {1-4244-0075-9},
}