R. Uma, P. Dhavachelvan. Synthesis optimization by redesigning FPGA architecture for area-speed optimization. In Natarajan Meghanathan, Michal Wozniak, editors, The Second International Conference on Computational Science, Engineering and Information Technology, CCSEIT '12, Coimbatore, India, October 26-28, 2012. pages 322-327, ACM, 2012. [doi]
Abstract is missing.