Ravi Tej Uppu, Ravi Kanth Uppu, Adit D. Singh, Abhijit Chatterjee. A High Throughput Multiplier Design Exploiting Input Based Statistical Distribution in Completion Delays. In 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, Pune, India, January 5-10, 2013. pages 109-114, IEEE, 2013. [doi]
@inproceedings{UppuUSC13,
title = {A High Throughput Multiplier Design Exploiting Input Based Statistical Distribution in Completion Delays},
author = {Ravi Tej Uppu and Ravi Kanth Uppu and Adit D. Singh and Abhijit Chatterjee},
year = {2013},
doi = {10.1109/VLSID.2013.172},
url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2013.172},
researchr = {https://researchr.org/publication/UppuUSC13},
cites = {0},
citedby = {0},
pages = {109-114},
booktitle = {26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, Pune, India, January 5-10, 2013},
publisher = {IEEE},
isbn = {978-1-4673-4639-9},
}