A Unified Architecture for BCD and Binary Adder/Subtractor

Chetan Kumar V., Sai Phaneendra P., Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas. A Unified Architecture for BCD and Binary Adder/Subtractor. In 14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland. pages 426-429, IEEE, 2011. [doi]

Authors

Chetan Kumar V.

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Sai Phaneendra P.

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Syed Ershad Ahmed

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Sreehari Veeramachaneni

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N. Moorthy Muthukrishnan

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M. B. Srinivas

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