Chetan Kumar V., Sai Phaneendra P., Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas. A Unified Architecture for BCD and Binary Adder/Subtractor. In 14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland. pages 426-429, IEEE, 2011. [doi]
@inproceedings{VPAVMS11-0,
title = {A Unified Architecture for BCD and Binary Adder/Subtractor},
author = {Chetan Kumar V. and Sai Phaneendra P. and Syed Ershad Ahmed and Sreehari Veeramachaneni and N. Moorthy Muthukrishnan and M. B. Srinivas},
year = {2011},
doi = {10.1109/DSD.2011.58},
url = {http://doi.ieeecomputersociety.org/10.1109/DSD.2011.58},
researchr = {https://researchr.org/publication/VPAVMS11-0},
cites = {0},
citedby = {0},
pages = {426-429},
booktitle = {14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland},
publisher = {IEEE},
isbn = {978-1-4577-1048-3},
}