Javier Valls, M. M. Peiro, Trinidad Sansaloni, Eduardo I. Boemo. Design and FPGA implementation of digit-serial FIR filters. In 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998 . pages 191-194, IEEE, 1998. [doi]
@inproceedings{VallsPSB98,
title = {Design and FPGA implementation of digit-serial FIR filters},
author = {Javier Valls and M. M. Peiro and Trinidad Sansaloni and Eduardo I. Boemo},
year = {1998},
doi = {10.1109/ICECS.1998.814860},
url = {https://doi.org/10.1109/ICECS.1998.814860},
researchr = {https://researchr.org/publication/VallsPSB98},
cites = {0},
citedby = {0},
pages = {191-194},
booktitle = {5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998 },
publisher = {IEEE},
isbn = {0-7803-5008-1},
}