FPGA Implementation of Inversion in Galois Field Over GF(2m) with FLT and ITA Using Quad Blocks

Vemanaboina Vamsi, Kishor Sarawadekar. FPGA Implementation of Inversion in Galois Field Over GF(2m) with FLT and ITA Using Quad Blocks. In IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2023, Hyderabad, India, November 19-22, 2023. pages 36-39, IEEE, 2023. [doi]

@inproceedings{VamsiS23,
  title = {FPGA Implementation of Inversion in Galois Field Over GF(2m) with FLT and ITA Using Quad Blocks},
  author = {Vemanaboina Vamsi and Kishor Sarawadekar},
  year = {2023},
  doi = {10.1109/APCCAS60141.2023.00020},
  url = {https://doi.org/10.1109/APCCAS60141.2023.00020},
  researchr = {https://researchr.org/publication/VamsiS23},
  cites = {0},
  citedby = {0},
  pages = {36-39},
  booktitle = {IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2023, Hyderabad, India, November 19-22, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-8119-1},
}