VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design

Lan-Da Van, Chin-Teng Lin, Yuan-Chu Yu. VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design. IEICE Transactions, 90-A(8):1644-1652, 2007. [doi]

Authors

Lan-Da Van

This author has not been identified. Look up 'Lan-Da Van' in Google

Chin-Teng Lin

This author has not been identified. Look up 'Chin-Teng Lin' in Google

Yuan-Chu Yu

This author has not been identified. Look up 'Yuan-Chu Yu' in Google