Anshul Varma, Sumanth Gururajarao, HsinChen Chen, Tao Chen, Gordon Gammie, Hugh Mair, Jen-Hang Yang, Hao-Hsiang Yu, Shun-Chieh Chang, Cheng-Hao Yang, Li-An Huang, Kumar Ramanathan, Ramesh Halli, Efron Ho, Ta-Wen Hung, Sung S.-Y. Hsueh, LiangChe Li, Achuta Thippana, Ericbill Wang, Sa Hwang. 2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC. In IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024. pages 36-38, IEEE, 2024. [doi]
@inproceedings{VarmaGCCGMYYCYHRHHHHLTWH24,
title = {2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC},
author = {Anshul Varma and Sumanth Gururajarao and HsinChen Chen and Tao Chen and Gordon Gammie and Hugh Mair and Jen-Hang Yang and Hao-Hsiang Yu and Shun-Chieh Chang and Cheng-Hao Yang and Li-An Huang and Kumar Ramanathan and Ramesh Halli and Efron Ho and Ta-Wen Hung and Sung S.-Y. Hsueh and LiangChe Li and Achuta Thippana and Ericbill Wang and Sa Hwang},
year = {2024},
doi = {10.1109/ISSCC49657.2024.10454494},
url = {https://doi.org/10.1109/ISSCC49657.2024.10454494},
researchr = {https://researchr.org/publication/VarmaGCCGMYYCYHRHHHHLTWH24},
cites = {0},
citedby = {0},
pages = {36-38},
booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024},
publisher = {IEEE},
isbn = {979-8-3503-0620-0},
}