Zdenek Vasícek, Lukás Sekanina. A global postsynthesis optimization method for combinational circuits. In Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011. pages 1525-1528, IEEE, 2011. [doi]
@inproceedings{VasicekS11-0,
title = {A global postsynthesis optimization method for combinational circuits},
author = {Zdenek Vasícek and Lukás Sekanina},
year = {2011},
url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5763326},
researchr = {https://researchr.org/publication/VasicekS11-0},
cites = {0},
citedby = {0},
pages = {1525-1528},
booktitle = {Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011},
publisher = {IEEE},
isbn = {978-1-61284-208-0},
}