A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN

Iason Vassiliou, Kostis Vavelidis, Theodore Georgantas, Sofoklis Plevridis, Nikos Haralabidis, George Kamoulakos, Charalambos Kapnistis, Spyros Kavadias, Yiannis Kokolakis, Panagiotis Merakos, Jacques C. Rudell, Akira Yamanaka, Stamatis Bouras, Ilias Bouras. A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN. J. Solid-State Circuits, 38(12):2221-2231, 2003. [doi]

@article{VassiliouVGPHKK03,
  title = {A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN},
  author = {Iason Vassiliou and Kostis Vavelidis and Theodore Georgantas and Sofoklis Plevridis and Nikos Haralabidis and George Kamoulakos and Charalambos Kapnistis and Spyros Kavadias and Yiannis Kokolakis and Panagiotis Merakos and Jacques C. Rudell and Akira Yamanaka and Stamatis Bouras and Ilias Bouras},
  year = {2003},
  doi = {10.1109/JSSC.2003.819086},
  url = {https://doi.org/10.1109/JSSC.2003.819086},
  researchr = {https://researchr.org/publication/VassiliouVGPHKK03},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {38},
  number = {12},
  pages = {2221-2231},
}