Mitigating read & write errors in STT-MRAM memories under DVS

Elena Ioana Vatajelu, Rosa Rodríguez-Montañés, Michel Renovell, Joan Figueras. Mitigating read & write errors in STT-MRAM memories under DVS. In 22nd IEEE European Test Symposium, ETS 2017, Limassol, Cyprus, May 22-26, 2017. pages 1-2, IEEE, 2017. [doi]

@inproceedings{VatajeluRRF17,
  title = {Mitigating read & write errors in STT-MRAM memories under DVS},
  author = {Elena Ioana Vatajelu and Rosa Rodríguez-Montañés and Michel Renovell and Joan Figueras},
  year = {2017},
  doi = {10.1109/ETS.2017.7968209},
  url = {https://doi.org/10.1109/ETS.2017.7968209},
  researchr = {https://researchr.org/publication/VatajeluRRF17},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {22nd IEEE European Test Symposium, ETS 2017, Limassol, Cyprus, May 22-26, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-5457-2},
}