Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits

Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira. Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits. IEEE Trans. on Circuits and Systems, 64(12):3081-3091, 2017. [doi]

Authors

Francisco Veirano

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Lirida A. B. Naviner

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Fernando Silveira

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