Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits

Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira. Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits. IEEE Trans. on Circuits and Systems, 64(12):3081-3091, 2017. [doi]

Abstract

Abstract is missing.