Miroslav N. Velev. Collection of High-Level Microprocessor Bugs from Formal Verification of Pipelined and Superscalar Designs. In Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA. pages 138-147, IEEE Computer Society, 2003. [doi]
@inproceedings{Velev03:0,
title = {Collection of High-Level Microprocessor Bugs from Formal Verification of Pipelined and Superscalar Designs},
author = {Miroslav N. Velev},
year = {2003},
url = {http://csdl.computer.org/comp/proceedings/itc/2003/2063/00/20630138abs.htm},
researchr = {https://researchr.org/publication/Velev03%3A0},
cites = {0},
citedby = {0},
pages = {138-147},
booktitle = {Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA},
publisher = {IEEE Computer Society},
isbn = {0-7803-8106-8},
}