A Fast Algorithm for Locating and Correcting Simple Design Errors in VLSI Digital Circuits

Andreas G. Veneris, Ibrahim N. Hajj. A Fast Algorithm for Locating and Correcting Simple Design Errors in VLSI Digital Circuits. In 7th Great Lakes Symposium on VLSI (GLS-VLSI 97), 13-15 March 1997, Urbana, IL, USA. pages 45-50, IEEE Computer Society, 1997. [doi]

Authors

Andreas G. Veneris

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Ibrahim N. Hajj

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