A Fast Algorithm for Locating and Correcting Simple Design Errors in VLSI Digital Circuits

Andreas G. Veneris, Ibrahim N. Hajj. A Fast Algorithm for Locating and Correcting Simple Design Errors in VLSI Digital Circuits. In 7th Great Lakes Symposium on VLSI (GLS-VLSI 97), 13-15 March 1997, Urbana, IL, USA. pages 45-50, IEEE Computer Society, 1997. [doi]

@inproceedings{VenerisH97,
  title = {A Fast Algorithm for Locating and Correcting Simple Design Errors in VLSI Digital Circuits},
  author = {Andreas G. Veneris and Ibrahim N. Hajj},
  year = {1997},
  url = {http://csdl.computer.org/comp/proceedings/glsvlsi/1997/7904/00/79040045abs.htm},
  tags = {design},
  researchr = {https://researchr.org/publication/VenerisH97},
  cites = {0},
  citedby = {0},
  pages = {45-50},
  booktitle = {7th Great Lakes Symposium on VLSI (GLS-VLSI  97), 13-15 March 1997, Urbana, IL, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-7904-2},
}