Haridimos T. Vergos, Costas Efstathiou. Diminished-1 Modulo 2:::n::: + 1 Squarer Design. In 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France. pages 380-386, IEEE Computer Society, 2004. [doi]
@inproceedings{VergosE04, title = {Diminished-1 Modulo 2:::n::: + 1 Squarer Design}, author = {Haridimos T. Vergos and Costas Efstathiou}, year = {2004}, url = {http://csdl.computer.org/comp/proceedings/dsd/2004/2203/00/22030380abs.htm}, tags = {design}, researchr = {https://researchr.org/publication/VergosE04}, cites = {0}, citedby = {0}, pages = {380-386}, booktitle = {2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France}, publisher = {IEEE Computer Society}, isbn = {0-7695-2203-3}, }