Speed Indicators for Circuit Optimization

Alexandre Verle, A. Landrault, Philippe Maurine, Nadine Azémard. Speed Indicators for Circuit Optimization. In Vassilis Paliouras, Johan Vounckx, Diederik Verkest, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings. Volume 3728 of Lecture Notes in Computer Science, pages 618-628, Springer, 2005. [doi]

@inproceedings{VerleLMA05,
  title = {Speed Indicators for Circuit Optimization},
  author = {Alexandre Verle and A. Landrault and Philippe Maurine and Nadine Azémard},
  year = {2005},
  doi = {10.1007/11556930_63},
  url = {http://dx.doi.org/10.1007/11556930_63},
  tags = {optimization},
  researchr = {https://researchr.org/publication/VerleLMA05},
  cites = {0},
  citedby = {0},
  pages = {618-628},
  booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings},
  editor = {Vassilis Paliouras and Johan Vounckx and Diederik Verkest},
  volume = {3728},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-29013-3},
}