RISC-V Core with Approximate Multiplier for Error-Tolerant Applications

Anu Verma, Priyamvada Sharma, Bishnu Prasad Das. RISC-V Core with Approximate Multiplier for Error-Tolerant Applications. In 25th Euromicro Conference on Digital System Design, DSD 2022, Maspalomas, Spain, August 31 - Sept. 2, 2022. pages 239-246, IEEE, 2022. [doi]

@inproceedings{VermaSD22,
  title = {RISC-V Core with Approximate Multiplier for Error-Tolerant Applications},
  author = {Anu Verma and Priyamvada Sharma and Bishnu Prasad Das},
  year = {2022},
  doi = {10.1109/DSD57027.2022.00040},
  url = {https://doi.org/10.1109/DSD57027.2022.00040},
  researchr = {https://researchr.org/publication/VermaSD22},
  cites = {0},
  citedby = {0},
  pages = {239-246},
  booktitle = {25th Euromicro Conference on Digital System Design, DSD 2022, Maspalomas, Spain, August 31 - Sept. 2, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-7404-7},
}