Mário P. Véstias, Horácio C. Neto, Helena Sarmento. Design of High-Speed Viterbi Decoders on Virtex-6 FPGAs. In 15th Euromicro Conference on Digital System Design, DSD 2012, Cesme, Izmir, Turkey, September 5-8, 2012. pages 938-945, IEEE, 2012. [doi]
@inproceedings{VestiasNS12-0,
title = {Design of High-Speed Viterbi Decoders on Virtex-6 FPGAs},
author = {Mário P. Véstias and Horácio C. Neto and Helena Sarmento},
year = {2012},
doi = {10.1109/DSD.2012.42},
url = {http://dx.doi.org/10.1109/DSD.2012.42},
researchr = {https://researchr.org/publication/VestiasNS12-0},
cites = {0},
citedby = {0},
pages = {938-945},
booktitle = {15th Euromicro Conference on Digital System Design, DSD 2012, Cesme, Izmir, Turkey, September 5-8, 2012},
publisher = {IEEE},
isbn = {978-1-4673-2498-4},
}