K. N. Vijeyakumar, S. Elango, S. Kalaiselvi. VLSI Implementation of High Speed Energy-Efficient Truncated Multiplier. Journal of Circuits, Systems, and Computers, 27(5):1-15, 2018. [doi]
@article{VijeyakumarEK18,
title = {VLSI Implementation of High Speed Energy-Efficient Truncated Multiplier},
author = {K. N. Vijeyakumar and S. Elango and S. Kalaiselvi},
year = {2018},
doi = {10.1142/S0218126618500779},
url = {https://doi.org/10.1142/S0218126618500779},
researchr = {https://researchr.org/publication/VijeyakumarEK18},
cites = {0},
citedby = {0},
journal = {Journal of Circuits, Systems, and Computers},
volume = {27},
number = {5},
pages = {1-15},
}