K. N. Vikram, V. Vasudevan. Mapping Data-Parallel Tasks Onto Partially Reconfigurable Hybrid Processor Architectures. IEEE Trans. VLSI Syst., 14(9):1010-1023, 2006. [doi]
@article{VikramV06:0,
title = {Mapping Data-Parallel Tasks Onto Partially Reconfigurable Hybrid Processor Architectures},
author = {K. N. Vikram and V. Vasudevan},
year = {2006},
doi = {10.1109/TVLSI.2006.884052},
url = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2006.884052},
tags = {architecture, data-flow},
researchr = {https://researchr.org/publication/VikramV06%3A0},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {14},
number = {9},
pages = {1010-1023},
}