Packet processing on FPGA SoC with DPDK

Jan Viktorin, Jan Korenek. Packet processing on FPGA SoC with DPDK. In Paolo Ienne, Walid A. Najjar, Jason Anderson, Philip Brisk, Walter Stechele, editors, 26th International Conference on Field Programmable Logic and Applications, FPL 2016, Lausanne, Switzerland, August 29 - September 2, 2016. pages 1-2, IEEE, 2016. [doi]

@inproceedings{ViktorinK16,
  title = {Packet processing on FPGA SoC with DPDK},
  author = {Jan Viktorin and Jan Korenek},
  year = {2016},
  doi = {10.1109/FPL.2016.7577395},
  url = {http://dx.doi.org/10.1109/FPL.2016.7577395},
  researchr = {https://researchr.org/publication/ViktorinK16},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {26th International Conference on Field Programmable Logic and Applications, FPL 2016, Lausanne, Switzerland, August 29 - September 2, 2016},
  editor = {Paolo Ienne and Walid A. Najjar and Jason Anderson and Philip Brisk and Walter Stechele},
  publisher = {IEEE},
  isbn = {978-2-8399-1844-2},
}