Hierarchical Test Generation for Analog Circuits Using Incremental Test Development - researchr publication authors

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Ramakrishna Voorakaranam, Abhijit Chatterjee. Hierarchical Test Generation for Analog Circuits Using Incremental Test Development. In 17th IEEE VLSI Test Symposium (VTS 99), 25-30 April 1999, San Diego, CA, USA. pages 296-303, IEEE Computer Society, 1999. [doi]

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