Efficient hardware task migration for heterogeneous FPGA computing using HDL-based checkpointing

Hoang Gia Vu, Takashi Nakada, Yasuhiko Nakashima. Efficient hardware task migration for heterogeneous FPGA computing using HDL-based checkpointing. Integration, 77:180-192, 2021. [doi]

@article{VuNN21,
  title = {Efficient hardware task migration for heterogeneous FPGA computing using HDL-based checkpointing},
  author = {Hoang Gia Vu and Takashi Nakada and Yasuhiko Nakashima},
  year = {2021},
  doi = {10.1016/j.vlsi.2020.11.011},
  url = {https://doi.org/10.1016/j.vlsi.2020.11.011},
  researchr = {https://researchr.org/publication/VuNN21},
  cites = {0},
  citedby = {0},
  journal = {Integration},
  volume = {77},
  pages = {180-192},
}