Synthesis of Ternary Logic Circuits Using 2: 1 Multiplexers

Chetan Vudadha, Ajay Surya, Saurabh Agrawal, M. B. Srinivas. Synthesis of Ternary Logic Circuits Using 2: 1 Multiplexers. IEEE Trans. on Circuits and Systems, 65-I(12):4313-4325, 2018. [doi]

Abstract

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