Power Reduction in Large Fan-in CMOS Gates in Logic Arrays Using Selective Precharge

Shaoyi Wang. Power Reduction in Large Fan-in CMOS Gates in Logic Arrays Using Selective Precharge. In 7th Great Lakes Symposium on VLSI (GLS-VLSI 97), 13-15 March 1997, Urbana, IL, USA. pages 83-85, IEEE Computer Society, 1997. [doi]

Abstract

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