Design and Evaluation of a High Throughput QoS-Aware and Congestion-Aware Router Architecture for Network-on-Chip

Chifeng Wang, Nader Bagherzadeh. Design and Evaluation of a High Throughput QoS-Aware and Congestion-Aware Router Architecture for Network-on-Chip. In Rainer Stotzka, Michael Schiffers, Yannis Cotronis, editors, Proceedings of the 20th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2012, Munich, Germany, February 15-17, 2012. pages 457-464, IEEE, 2012. [doi]

Abstract

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