Wei-min Wang, Du-yan Bi, Xingmin Du, Lin-hua Ma. A VLSI Design of a Pipelining and Area-Efficient Reed-Solomon Decoder. IEICE Transactions, 90-D(8):1301-1303, 2007. [doi]
@article{WangBDM07,
title = {A VLSI Design of a Pipelining and Area-Efficient Reed-Solomon Decoder},
author = {Wei-min Wang and Du-yan Bi and Xingmin Du and Lin-hua Ma},
year = {2007},
doi = {10.1093/ietisy/e90-d.8.1301},
url = {http://dx.doi.org/10.1093/ietisy/e90-d.8.1301},
tags = {design},
researchr = {https://researchr.org/publication/WangBDM07},
cites = {0},
citedby = {0},
journal = {IEICE Transactions},
volume = {90-D},
number = {8},
pages = {1301-1303},
}