Yunfeng Wang, Jinian Bian, Xianlong Hong, Liu Yang, Qiang Zhou, Qiang Wu. A New Methodology of Integrating High Level Synthesis and Floorplan for SoC Design. In Laurence Tianruo Yang, Xingshe Zhou, Wei Zhao, Zhaohui Wu, Yian Zhu, Man Lin, editors, Embedded Software and Systems, Second International Conference, ICESS 2005, Xi an, China, December 16-18, 2005, Proceedings. Volume 3820 of Lecture Notes in Computer Science, pages 275-286, Springer, 2005. [doi]
Abstract is missing.