Tian Wang, Xiaoxin Cui, Kai Liao, Nan Liao, Yewen Ni, Dunshan Yu, Xiaole Cui. Employing the mixed FBB/RBB in the design of FinFET logic gates. In 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{WangCLLNYC15, title = {Employing the mixed FBB/RBB in the design of FinFET logic gates}, author = {Tian Wang and Xiaoxin Cui and Kai Liao and Nan Liao and Yewen Ni and Dunshan Yu and Xiaole Cui}, year = {2015}, doi = {10.1109/ASICON.2015.7517049}, url = {https://doi.org/10.1109/ASICON.2015.7517049}, researchr = {https://researchr.org/publication/WangCLLNYC15}, cites = {0}, citedby = {0}, pages = {1-4}, booktitle = {2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015}, publisher = {IEEE}, isbn = {978-1-4799-8485-5}, }