A 45 nm 10T Dual-Port SRAM with Shared Bit-Line Scheme for Low Power Operation

Dao-Ping Wang, Wei Hwang. A 45 nm 10T Dual-Port SRAM with Shared Bit-Line Scheme for Low Power Operation. J. Low Power Electronics, 8(4):472-484, 2012. [doi]

Abstract

Abstract is missing.