FPGA-Based 40.9-Gbits/s Masked AES With Area Optimization for Storage Area Network

Yi Wang, Yajun Ha. FPGA-Based 40.9-Gbits/s Masked AES With Area Optimization for Storage Area Network. IEEE Trans. on Circuits and Systems, 60-II(1):36-40, 2013. [doi]

Authors

Yi Wang

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Yajun Ha

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