Yi Wang, Yajun Ha. FPGA-Based 40.9-Gbits/s Masked AES With Area Optimization for Storage Area Network. IEEE Trans. on Circuits and Systems, 60-II(1):36-40, 2013. [doi]
@article{WangH13-26,
title = {FPGA-Based 40.9-Gbits/s Masked AES With Area Optimization for Storage Area Network},
author = {Yi Wang and Yajun Ha},
year = {2013},
doi = {10.1109/TCSII.2012.2234891},
url = {http://dx.doi.org/10.1109/TCSII.2012.2234891},
researchr = {https://researchr.org/publication/WangH13-26},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on Circuits and Systems},
volume = {60-II},
number = {1},
pages = {36-40},
}