Chih-Wea Wang, Jing-Reng Huang, Yen-Fu Lin, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin. Test Scheduling of BISTed Memory Cores for SOC. In 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA. pages 356, IEEE Computer Society, 2002. [doi]
Abstract is missing.