A reduced reference spur multiplying delay-locked loop

Xinjie Wang, Tadeusz Kwasniewski. A reduced reference spur multiplying delay-locked loop. I. J. Circuit Theory and Applications, 44(8):1620-1627, 2016. [doi]

@article{WangK16-23,
  title = {A reduced reference spur multiplying delay-locked loop},
  author = {Xinjie Wang and Tadeusz Kwasniewski},
  year = {2016},
  doi = {10.1002/cta.2176},
  url = {https://doi.org/10.1002/cta.2176},
  researchr = {https://researchr.org/publication/WangK16-23},
  cites = {0},
  citedby = {0},
  journal = {I. J. Circuit Theory and Applications},
  volume = {44},
  number = {8},
  pages = {1620-1627},
}