Mingyu Wang, Zhaolin Li. STLAC: A spatial and temporal locality-aware cache and network-on-chip codesign for tiled many-core systems. In 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016. pages 37-42, IEEE, 2016. [doi]
@inproceedings{WangL16-10,
title = {STLAC: A spatial and temporal locality-aware cache and network-on-chip codesign for tiled many-core systems},
author = {Mingyu Wang and Zhaolin Li},
year = {2016},
doi = {10.1109/ASPDAC.2016.7427986},
url = {http://dx.doi.org/10.1109/ASPDAC.2016.7427986},
researchr = {https://researchr.org/publication/WangL16-10},
cites = {0},
citedby = {0},
pages = {37-42},
booktitle = {21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016},
publisher = {IEEE},
isbn = {978-1-4673-9569-4},
}