Haibin Wang, Mulong Li, Xixi Dai, Shuting Shi, Li Chen 0001, Gang Guo. Layout-based Single Event Mitigation Techniques for Dynamic Logic Circuits. J. Electronic Testing, 32(1):97-103, 2016. [doi]
@article{WangLDS0G16,
title = {Layout-based Single Event Mitigation Techniques for Dynamic Logic Circuits},
author = {Haibin Wang and Mulong Li and Xixi Dai and Shuting Shi and Li Chen 0001 and Gang Guo},
year = {2016},
doi = {10.1007/s10836-015-5559-8},
url = {http://dx.doi.org/10.1007/s10836-015-5559-8},
researchr = {https://researchr.org/publication/WangLDS0G16},
cites = {0},
citedby = {0},
journal = {J. Electronic Testing},
volume = {32},
number = {1},
pages = {97-103},
}