A fast dynamic 64-bit comparator with small transistor count

Chua-Chin Wang, Hsin-Long Wu, Chih-Feng Wu. A fast dynamic 64-bit comparator with small transistor count. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 545-548, IEEE, 2000. [doi]

Authors

Chua-Chin Wang

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Hsin-Long Wu

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Chih-Feng Wu

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