Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories - researchr publication authors

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Xuan Wang, Jiang Xu, Wei Zhang 0012, Xiaowen Wu, Yaoyao Ye, Zhehui Wang, Mahdi Nikdast, Zhe Wang. Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories. In Enrico Macii, editor, Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013. pages 1221-1224, EDA Consortium San Jose, CA, USA / ACM DL, 2013. [doi]

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