Low-Power Redundant-Transition-Free TSPC Dual-Edge-Triggering Flip-Flop Using Single-Transistor-Clocked Buffer

Zisong Wang, Peiyi Zhao, Tom Springer, Congyi Zhu, Jaccob Mau, Andrew Wells, Yinshui Xia, Lingli Wang. Low-Power Redundant-Transition-Free TSPC Dual-Edge-Triggering Flip-Flop Using Single-Transistor-Clocked Buffer. IEEE Trans. VLSI Syst., 31(5):706-710, May 2023. [doi]

@article{WangZSZMWXW23,
  title = {Low-Power Redundant-Transition-Free TSPC Dual-Edge-Triggering Flip-Flop Using Single-Transistor-Clocked Buffer},
  author = {Zisong Wang and Peiyi Zhao and Tom Springer and Congyi Zhu and Jaccob Mau and Andrew Wells and Yinshui Xia and Lingli Wang},
  year = {2023},
  month = {May},
  doi = {10.1109/TVLSI.2023.3251286},
  url = {https://doi.org/10.1109/TVLSI.2023.3251286},
  researchr = {https://researchr.org/publication/WangZSZMWXW23},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {31},
  number = {5},
  pages = {706-710},
}