A 476-gate-count dynamic optically reconfigurable gate array VLSI chip in a standard 0.35 micrometer CMOS technology

Minoru Watanabe, Fuminori Kobayashi. A 476-gate-count dynamic optically reconfigurable gate array VLSI chip in a standard 0.35 micrometer CMOS technology. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 108-109, IEEE, 2006. [doi]

@inproceedings{WatanabeK06,
  title = {A 476-gate-count dynamic optically reconfigurable gate array VLSI chip in a standard 0.35 micrometer CMOS technology},
  author = {Minoru Watanabe and Fuminori Kobayashi},
  year = {2006},
  doi = {10.1145/1118299.1118330},
  url = {http://doi.acm.org/10.1145/1118299.1118330},
  researchr = {https://researchr.org/publication/WatanabeK06},
  cites = {0},
  citedby = {0},
  pages = {108-109},
  booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006},
  editor = {Fumiyasu Hirose},
  publisher = {IEEE},
  isbn = {0-7803-9451-8},
}