Offset compensating bit-line sensing scheme for high density DRAM's

Yohji Watanabe, Nobuo Nakamura, Shigeyoshi Watanabe. Offset compensating bit-line sensing scheme for high density DRAM's. J. Solid-State Circuits, 29(1):9-13, January 1994. [doi]

@article{WatanabeNW94,
  title = {Offset compensating bit-line sensing scheme for high density DRAM's},
  author = {Yohji Watanabe and Nobuo Nakamura and Shigeyoshi Watanabe},
  year = {1994},
  month = {January},
  doi = {10.1109/4.272089},
  url = {https://doi.org/10.1109/4.272089},
  researchr = {https://researchr.org/publication/WatanabeNW94},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {29},
  number = {1},
  pages = {9-13},
}