Power efficiency benchmarking of a partially reconfigurable, many-tile system implemented on a Xilinx Virtex-6 FPGA

Raymond J. Weber, Justin A. Hogan, Brock J. LaMeres. Power efficiency benchmarking of a partially reconfigurable, many-tile system implemented on a Xilinx Virtex-6 FPGA. In 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013, Cancun, Mexico, December 9-11, 2013. pages 1-4, IEEE, 2013. [doi]

Abstract

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