Zhaopeng Wei, Yves Leduc, Emeric de Foucauld, Gilles Jacquemod. Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology. In 15th IEEE International New Circuits and Systems Conference, NEWCAS 2017, Strasbourg, France, June 25-28, 2017. pages 121-124, IEEE, 2017. [doi]
Abstract is missing.