A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition

Xing Wei, Haigang Yang, Wei Li, Zhihong Huang, Tao Yin, Le Yu. A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition. Integration, 66:164-172, 2019. [doi]

@article{WeiYLHYY19,
  title = {A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition},
  author = {Xing Wei and Haigang Yang and Wei Li and Zhihong Huang and Tao Yin and Le Yu},
  year = {2019},
  doi = {10.1016/j.vlsi.2019.02.008},
  url = {https://doi.org/10.1016/j.vlsi.2019.02.008},
  researchr = {https://researchr.org/publication/WeiYLHYY19},
  cites = {0},
  citedby = {0},
  journal = {Integration},
  volume = {66},
  pages = {164-172},
}