Test clock domain optimization for peak power supply noise reduction during scan

Jen-Yang Wen, Yu-Chuan Huang, Min-Hong Tsai, Kuan-Yu Liao, James Chien-Mo Li, Ming-Tung Chang, Min-Hsiu Tsai, Chih-Mou Tseng, Hung-Chun Li. Test clock domain optimization for peak power supply noise reduction during scan. In Bill Eklow, R. D. (Shawn) Blanton, editors, 2011 IEEE International Test Conference, ITC 2011, Anaheim, CA, USA, September 20-22, 2011. pages 1-8, IEEE, 2011. [doi]

@inproceedings{WenHTLLCTTL11,
  title = {Test clock domain optimization for peak power supply noise reduction during scan},
  author = {Jen-Yang Wen and Yu-Chuan Huang and Min-Hong Tsai and Kuan-Yu Liao and James Chien-Mo Li and Ming-Tung Chang and Min-Hsiu Tsai and Chih-Mou Tseng and Hung-Chun Li},
  year = {2011},
  doi = {10.1109/TEST.2011.6139163},
  url = {http://dx.doi.org/10.1109/TEST.2011.6139163},
  researchr = {https://researchr.org/publication/WenHTLLCTTL11},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {2011 IEEE International Test Conference, ITC 2011, Anaheim, CA, USA, September 20-22, 2011},
  editor = {Bill Eklow and R. D. (Shawn) Blanton},
  publisher = {IEEE},
  isbn = {978-1-4577-0153-5},
}