Tomi Westerlund, Juha Plosila. Formal Modelling of Synchronous Hardware Components for System-on-Chip. In Proceedings of the 2005 International Symposium on System-on-Chip, Tampere, Finland, November 15-17, 2005. pages 116-119, IEEE, 2005. [doi]
@inproceedings{WesterlundP05-0,
title = {Formal Modelling of Synchronous Hardware Components for System-on-Chip},
author = {Tomi Westerlund and Juha Plosila},
year = {2005},
doi = {10.1109/ISSOC.2005.1595658},
url = {https://doi.org/10.1109/ISSOC.2005.1595658},
researchr = {https://researchr.org/publication/WesterlundP05-0},
cites = {0},
citedby = {0},
pages = {116-119},
booktitle = {Proceedings of the 2005 International Symposium on System-on-Chip, Tampere, Finland, November 15-17, 2005},
publisher = {IEEE},
isbn = {0-7803-9294-9},
}